The disclosure relates to a semiconductor device, and more particularly, to a semiconductor device with void-free shallow trench isolation (STI) and a method of forming such semiconductor device.
Generally, shallow trench isolations (STIs) are used to separate and isolate active areas, such as transistors and photo diodes, on a semiconductor wafer from each other. The STIs are formed by etching trenches, forming silicon oxide liners in the trenches, overfilling the trenches with a dielectric material such as an oxide, and then removing any excess dielectric outside the trenches. This dielectric material helps to electrically isolate the active areas from each other. However, due to some factors such as a high deposition rate of dielectric material or a high aspect ratio of the trench, the dielectric material tend collect at top corners of the trench, thus forming overhangs at the top corners of the trench. These overhangs typically grow together faster than the trench is filled with the dielectric material, and a void in the dielectric material filling the trench is created. The void existing in the trench is a critical issue, which may cause acid remaining, worse isolation performance, even semiconductor device function failure, for example.